Carry Save Adder Verilog Code | Verilog Implementation of Carry Save Adder

Carry Save Adder Verilog Code

Verilog Implementation of Carry Save Adder

 

In this we are going to share the Verilog code of carry save adder.  We have already shared Verilog code of Ripple Carry Adder, Carry Skip AdderCarry Look-ahead Adder etc.  

We have implemented 4 bit carry save adder in Verilog with 3 inputs A, B, C of 4-bits and one Carry Input D of 4bits.. The following diagram shows the block level implementation of carry save adder. The Verilog code of carry save adder is written as per the blocks.

Carry Save Adder Verilog Code

 

Carry Save Adder Test Bench Code

Carry Save Adder Simulation Result

 

If you have any query/suggestion please feel free to comment below the post.

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noc
noc
8 months ago

Hi, I want to ask, on the beginning you said that 4 bit carry save adder in Verilog with 3 inputs.
But on the code and the block diagram, it seems to be 4 inputs with 4 bit. Could you explain that part ?

And also how to do it if I want to expand it maybe into 8bit or 16 bit? Thanks